My research project this summer focused on investigating the feasibility of using FPGAs and cameras for jaundice detection, specifically in neonates. "Okay, but why does this matter? Aren't there already methods to detect jaundice?" Good question! Neonatal jaundice affects up to 60% of newborns worldwide. While often harmless, if left undetected, it can lead to severe complications, including brain damage. Current detection methods are either invasive, expensive, or subjective. That's where this research approach comes in. The goal is to see how feasible a non-invasive, cost-effective, and accurate method of detection using FPGAs (Field-Programmable Gate Arrays) and cameras is.

"FPGA!? What's that?" Simply put, it's a type of computer chip that can be programmed to perform specific tasks very efficiently. In this case, I’m using it with a camera to analyze images of newborns to detect jaundice. The objective is to create a system that can quickly and accurately assess jaundice risk without the need for blood tests or specialized equipment.

Starting this project was exciting and terrifying in equal measure. Like many Laidlaw scholars, I experienced imposter syndrome. Coupled with my limited knowledge of FPGAs, this meant there was a steep learning curve ahead, so I began the project by studying research papers and understanding similar approaches that had been implemented. It was a long and often tedious process, but each new insight felt like a small victory.

Developing the algorithm was a journey in itself, but getting familiar with the development tools and environment was even more challenging! I started with basic color space conversions, testing thresholds to extract my region of interest (ROI) from the images, and then performed a basic yellowness index calculation on this ROI. The challenge was to create something that could reliably detect the subtle yellow tones of jaundice across various skin colors and lighting conditions.

To be honest, there were days when I felt completely out of my depth. I spent hours and days poring over AMD’s Xilinx support forums,  hardware documentations, watching YouTube tutorials at 0.5x speed, and frantically posting bugs on Stack Overflow—only to deal with issues that had zero Google search results. But over time, piece by piece, it all started coming together.

Implementing this algorithm on an FPGA was where things got really interesting. There were days filled with "Oh, that's why it doesn’t work, duh!" moments, followed by "Nope, that didn’t work either" frustrations. But then came the eureka moments: "Wait, it works now! Why?". Looking back, these cycles of struggle and breakthrough, to be fair, made the whole process all the more rewarding.

One experience stands out. I had been struggling with an error for a while, and I couldn’t figure out the problem. Frustration was setting in. I stumbled upon a YouTube comment from someone who had the exact same error with the same board I was using. They explained how they resolved it to me, and it turned out I was missing some critical design specification files. That experience taught me two things: I have to pay closer attention to details, and never underestimate where help might come from!

Looking back on this process and project, what stands out the most to me isn’t just the technical milestones, but the process of failing forward. I’ve realized that each roadblock, error, and frustration was an opportunity to learn, solve problems, and become more resilient. It reminded me that progress is not linear. Sometimes, it’s about taking two steps back to move forward with a deeper understanding. From barely knowing what an FPGA was to creating a baseline implementation for detecting jaundice, it has certainly been quite the experience. But more importantly, there’s still a long way to go and so much more to do. From improving the algorithm’s accuracy to making the system more compact and accessible, the potential for future improvements feels endless. The journey has just begun. Thank you for reading!